Monday, November 11, 2013

[Book] OpenStack


Deploying OpenStack
Creating Open Source Clouds

By Ken Pepple

Publisher: O'Reilly Media
Released: July 2011





OpenStack Cloud Computing Cookbook
Over 100 recipes to successfully set up and manage your OpenStack cloud environments with complete coverage of Nova, Swift, Keystone, Glance, and Horizon

By Kevin Jackson
Publisher: Packt Publishing
Released: September 2012

Wednesday, October 30, 2013

Xcode 5.0.1

Xcode v5.0.1

C Compiler:
Apple LLVM version 5.0 (clang-500.2.79) (based on LLVM 3.3svn)

My first command line program "Hello".


/Users/scottshu/Library/Developer/Xcode/DerivedData

How to start implement my first "Hello" program

1) Create a new Xcode project

2) Click "Command Line Tool", and "Next"
3) Choose options for your new project:, and "Next"
4) Create folder and git repository for the new project
5) The project is created successfully
6) Build and then run it

Done! 



Tuesday, October 29, 2013

Springer Series in Advanced Microelectronics

Springer Series in Advanced Microelectronics

Flash Memories
Economic Principles of Performance, Cost and Reliability Optimization
2014

Inside Solid State Drives (SSDs)
2013 (PDF)

Inside NAND Flash Memories
2010 (PDF)

Friday, October 25, 2013

MAC OS X

Mac OS X 10.6.8
Mac OS X 10.9 Mavericks (Free)

Wednesday, October 16, 2013

802.11ac Benchmark

Broadcom

Qualcomm Atheros


Realtek
EW-7822UAC 802.11ac USB 3.0 adapter uses the 2T2R RTL8812AU chipset, and has a foldaway antenna for optimum signal performance.


MTK Ralink

Wednesday, October 9, 2013

ARM Cache, MMU, and TLB

TLB
TLB maintenance and configuration operations are controlled through CP15 coprocessor. This coprocessor provides a standard mechanism for configuring the level one memory system.

The Cortex-A9 processor implements a 2-level TLB structure. Four entries in the main TLB are lockable.
  • Instruction side micro TLB
  • Data side micro TLB
  • Unified main TLB
Micro TLB: The first level of caching for the page table information is a micro TLB of 32 entries that is implemented on each of the instruction and data sides. These blocks provide a fully associative lookup of the virtual addresses in a single CLK signal cycle. The micro TLB returns the physical address to the cache for the address comparison, and also checks the protection attributes to signal either a Prefetch Abort or a Data Abort.
Main TLB: The main TLB catches the misses from the micro TLBs. It also provides a centralized source for lockable translation entries.

MMU
The MMU works with the L1 and L2 memory system (L1 and L2 Cache) to translate virtual addresses to physical addresses. It also controls accesses to and from external memory.

The Virtual Memory System Architecture version 7 (VMSAv7) features include the following:

  • page table entries that support 4KB, 64KB, 1MB, and 16MB
  • 16 domains
  • global and address space identifiers to remove the requirement for context switch TLB flushes
  • extended permissions check capability.
Example: Identity Mapping (Virtual Address = Physical Address)

Init Page Table:

init_pagetable:
    ldr   r2, =0b00000000000000000000110000000010
    ldr   r0, =PAGE_TABLE_ADDR     
    ldr   r1, =0xfff             @ loop 4096
write_descriptor:
    orr   r3, r2, r1, LSL #20             
    str   r3, [r0, r1, LSL #2]            
    subs  r1, r1, #1                      
    bpl   write_descriptor

    /* Set different cacheable attributes */
    @ inner write back, write allocate
    @ set TEX as write back, write allocate
    orr   r3, r2, #1 << 20          
    bic   r3, r3, #0b1100          @ clear CB bits
    orr   r3, r3, #0b0100
    bic   r3, r3, #0b111000000000000 @ clear TEX bits
    orr   r3, r3, #0b101000000000000
    str   r3, [r0, #0x4]

    @ inner non-cacheable
    @ set TEX as write back, write allocate
    orr   r3, r2, #2 << 20          
    bic   r3, r3, #0b1100
    orr   r3, r3, #0b0000
    bic   r3, r3, #0b111000000000000
    orr   r3, r3, #0b101000000000000
    str   r3, [r0, #0x8]

    @ inner write back, write allocate
    @ outer non-cacheable
    orr   r3, r2, #3 << 20          
    bic   r3, r3, #0b1100
    orr   r3, r3, #0b0100
    bic   r3, r3, #0b111000000000000
    orr   r3, r3, #0b100000000000000
    str   r3, [r0, #0xc]

    @ inner non-cacheable
    @ outer non-cacheable
    orr   r3, r2, #4 << 20          
    bic   r3, r3, #0b1100
    orr   r3, r3, #0b0000
    bic   r3, r3, #0b111000000000000
    orr   r3, r3, #0b100000000000000
    str   r3, [r0, #0x10]

Init MMU:

    @ Write Translation Table Base Control Register
    mov   r0, #0x0
    mcr   p15, 0, r0, c2, c0, 2      

    @ Write Translation Table Base Register 0
    ldr   r0, =PAGE_TABLE_ADDR
    mcr   p15, 0, r0, c2, c0, 0           

    @ Write Domain Access Control Register
    @ Set Domains 0 to Client
    mov   r0, #0x01
    mcr   p15, 0, r0, c3, c0, 0

Enable MMU:

    @ Read Control Register configuration data
    mrc   p15, 0, r0, c1, c0, 0           
    orr   r0, r0, #0x1
    mcr   p15, 0, r0, c1, c0, 0

Monday, September 23, 2013

LLVM

LLVM (Low Level Virtual Machine)

Compiler Technology Components
ClooG:
CLooG is a free software and library to generate code for scanning Z-polyhedra. Install CLoog for Polly.

Polly:
Polly is a polyhedral optimizer for LLVM.

Clang:
Clang is to create a new C, C++, Objective C and Objective C++ front-end for the LLVM compiler.

lld:
The LLVM Linker.

LLDB:
LLDB is a high-performance debugger. It is built as a set of reusable components which highly leverage existing libraries in the larger LLVM Project, such as the Clang expression parser and LLVM disassembler.

libcxx:
libc++ is a new implementation of the C++ standard library, targeting C++11.

How to build LLVM on MacBook Air

$ mkdir LLVM
$ cd LLVM
$ wget http://llvm.org/releases/3.4/llvm-3.4.src.tar.gz
$ wget http://llvm.org/releases/3.4/clang-3.4.src.tar.gz
$ wget http://llvm.org/releases/3.4/compiler-rt-3.4.src.tar.gz
$ tar zxf llvm-3.4.src.tar.gz
$ tar zxf clang-3.4.src.tar.gz
$ tar zxf compiler-rt-3.4.src.tar.gz
$ mv clang-3.4/ llvm-3.4/tools/clang/
$ mv compiler-rt-3.4/ llvm-3.4/projects/compiler-rt/

$ mkdir llvm-3.4.build
$ cd llvm-3.4.build
$ ../llvm-3.4/configure --enable-shared
$ time make
 . . . . . . wait . . . . . .

real   88m6.255s
user  82m21.556s
sys   4m25.115s

$ make check-all

Before starting to use LLVM, please remember to include the LLVM binaries in our path.

#(?) Now, you can compile C code by using the clang -- the C front-end for the LLVM compiler.

Thursday, September 12, 2013

Intel Bay Trail Atom processor family

Intel

  • Bay Trail-T
  • Bay Trail-M
  • Celeron N2805 (Bay Trail-M), 2 cores @ 1,46 GHz, 4.5W TDP
    Celeron N2810 (Bay Trail-M), 2 cores @ 2,00 GHz, 7.5W TDP
    Celeron N2910 (Bay Trail-M), 4 cores @ 1,60 GHz, 7.5W TDP
    Pentium N3510 (Bay Trail-M), 4 cores @ 2,00 GHz, 7.5W TDP


  • Bay Trail-D
  • Celeron J1750 (Bay Trail-D), 2 cores @ 2,41 GHz, 10W TDP
    Celeron J1850 (Bay Trail-D), 4 cores @ 2,00 GHz, 10W TDP
    Pentium J2850 (Bay Trail-D), 4 cores @ 2,41 GHz, 10W TDP


  • Bay Trail-I
  • Atom E3810 (Bay Trail-I), 1 core @ 1,46 GHz, 5W TDP
    Atom E3821 (Bay Trail-I), 2 cores @ 1,33 GHz, 6W TDP
    Atom E3822 (Bay Trail-I), 2 cores @ 1,46 GHz, 7W TDP
    Atom E3823 (Bay Trail-I), 2 cores @ 1,75 GHz, 8W TDP
    Atom E3840 (Bay Trail-I), 4 cores @ 1,91 GHz, 10W TDP


    Obviously, this new processor family is against ARM.

    ARM


  • Cortex-A
  • Cortex-M
  • Cortex-R
  • Monday, August 26, 2013

    Tizen

    Tizen is a fresh new project (start from 2011.09). This new ecosystem is for smartphones, tablets, in-vehicle infotainment (IVI) devices, and smart TVs.

    We already have Android, why Tizen? Everyone wants to be the boss. :)

    Thursday, July 18, 2013

    Monday, July 15, 2013

    Reliability

    Index

  • EFR (Early Failure Rate)
  • EFR is an estimate (in ppm) of the number of early failures related to the number of devices used. Early failures are normally those which occur within the first 300 to 1000 h. Essentially, this period of time covers the guarantee period of the finished unit. Low EFR values are therefore very important to the device user. The early life failure rate is heavily influenced by complexity. Consequently, ‘designing-in’ of better quality during the development and design phase, as well as optimized process control during manufacturing, significantly reduces the EFR value. Normally, the early failure rate should not be significantly higher than the random failure rate. EFR is given in ppm (parts per million).


  • LFR (Long-term Failure Rate)
  • LFR shows the failure rate during the operational period of the devices. This period is of particular interest to the manufacturer of the final product. Based on the LFR value, estimations concerning long-term failure rate, reliability and a device’s or module’s usage life may be derived. The usage life time is normally the period of constant failure rate.


  • AOQ (Average Outgoing Quality)
  • All outgoing products are sampled after 100 % testing. This is known as AOQ. The results of this inspection are recorded in ppm (parts per million) using the method defined in JEDEC 16.

    Reference:

    Tuesday, July 9, 2013

    Linux Network Fast Path

    Linux Network Fast Path Solution

    Broadcom FASTPATH Networking Software (Software Spec.)

    Freescale Application-Specific Fastpath (ASF)

    Monday, July 1, 2013

    Linux Expert Series




  • Rami Rosen: http://ramirose.wix.com/ramirosen

  • Networking (PDF 2003,)
    Namespaces and cgroups (PDF 2003,)

    Linux Kernel Networking: Implementation and Theory (Apress)



    Publishing December 27, 2013
    ISBN13: 978-1-4302-6196-4
    600 Pages













  • Wednesday, June 26, 2013

    Binary Hacks

    GNU Tools: What the following commands can do for your debugging?
    arm-linux-addr2line
    arm-linux-cpp
    arm-linux-gcov
    arm-linux-nm
    arm-linux-size
    arm-linux-ar
    arm-linux-elfedit
    arm-linux-gdb
    arm-linux-objcopy
    arm-linux-sprite
    arm-linux-as
    arm-linux-g++
    arm-linux-gdbtui
    arm-linux-objdump
    arm-linux-strings
    arm-linux-c++
    arm-linux-gcc
    arm-linux-gprof
    arm-linux-ranlib
    arm-linux-strip
    arm-linux-c++filt
    arm-linux-ld
    arm-linux-readelf


  • Linux Kernel

  • Case1: Oops (NULL Pointer exception)

    The arm-linux-addr2line can find exactly where the oops occurred.
    Example:
    [ ] # arm-linux-addr2line -f -e vmlinux  <PC> 

  • Linux Application


  • Reference:

    Book:
    Binary Hacks

    Wednesday, May 8, 2013

    Bus Blaster

    Bus Blaster v2 is an experimental, high-speed JTAG debugger for ARM processors, FPGAs, CPLDs, flash, and more.

    http://dangerousprototypes.com/docs/Bus_Blaster

    Reference:

  • HOWTO install OpenOCD in Fedora 14
  • Thursday, January 31, 2013

    802.11ac standard


    802.11ac: A Survival Guide (PDF)
    Wi-Fi Above 1 Gbps

    By Matthew Gast


    Publisher: O'Reilly Media
    Released: August 2013
    Pages: 129





    The 5G chips use the in-development 802.11ac standard.

    Broadcom

    • BCM4360 supports the PCIe interface and implements 3-stream 802.11ac specifications, and reaches speeds up to 1.3 Gbps.
    • BCM4352 and BCM43526 implement 2-stream 802.11ac specification to reach up to 867 Mbps. BCM4352 supports PCIe interface; BCM43526 supports the USB interface.
    • BCM43516 supports USB and reaches speeds of up to 433 Mbps with its single stream 802.11ac implementation.

    All four models use the 80 MHz channel and a technology called beamforming, which uses specific receivers to increase the operational range.

    Atheros



    Reference:
    http://www.wikidevi.com/wiki/List_of_802.11ac_Hardware

    Tuesday, January 22, 2013

    802.11n standard



    802.11n: A Survival Guide (PDF)
    Wi-Fi Above 100 Mbps


    By Matthew Gast

    Publisher: O'Reilly Media
    Released: April 2012
    Pages: 146




    IEEE Standard
    IEEE 802.11n-2009—Amendment 5: Enhancements for Higher Throughput. (PDF)

    Reference:
    1. IEEE 802.11 working group
    2. 802.11ac: http://scottshulinux.blogspot.tw/2013/01/80211ac-standard.html

    Friday, January 11, 2013

    HOWTO: recover deleted files from an ext3 or ext4 partition

    extundelete

    extundelete is a utility that can recover deleted files from an ext3 or ext4 partition. extundelete uses information stored in the partition's journal to attempt to recover a file that has been deleted from the partition.

    But, there is no guarantee that the deleted file will be able to be undeleted!

    For example:
    [ ]# extundelete /dev/sdc1 --restore-all

    extundelete will restore any files it finds to a subdirectory of the current directory named “RECOVERED_FILES”.

    Wednesday, January 2, 2013

    Freescale iMX6


    Description: i.MX6Q SABRE LITE BOARD
    Silicon Manufacturer:Freescale
    Core Architecture:ARM
    Core Sub-Architecture:Cortex - A9
    Silicon Core Number:i.MX6
    Silicon Family Name:i.MX6 Quad