Wednesday, December 7, 2011
ARM Versatile Express Cortex-A9 (1) BootMonitor
ARM V2M Boot loader v1.1.2
HBI0190 build 1280
ARM V2M Firmware v2.2.5
Build Date: Apr 5 2011
Date: Tue 20 Apr 2004
Time: 06:51:39
Press Enter to stop auto boot...
Daughterboard fitted to site 1.
Switching on ATXPSU...
ATX3V3: ON
VIOset: 1.8V
MBtemp: 34 degC
Configuring motherboard (rev D, var A)...
IOFPGA config: PASSED
MUXFPGA config: PASSED
OSC CLK config: PASSED
Testing SMC devices (FPGA build 5)...
SRAM 32MB test: PASSED
VRAM 8MB test: PASSED
LAN9118 test: PASSED
USB & OTG test: PASSED
KMI1/KMI2 test: PASSED
MMC & SD test: PASSED
DVI image test: PASSED
AACI AC97 test: PASSED
CF card test: PASSED
UART port test: PASSED
V2M-P1 Peripheral Tests
=======================
1. SMC SRAM : Not Run
2. LAN9118 : Not Run
3. USB & OTG : Not Run
4. KMI1/KMI2 : Not Run
5. MMC & SD : Not Run
6. DVI image : Not Run
7. AACI AC97 : Not Run
8. CF card : Not Run
9. UART port : Not Run
0. Exit
Choice: 1
SMC SRAM and VRAM test...
SRAM 32MB test: PASSED
VRAM 8MB test: PASSED
V2M-P1 Peripheral Tests
=======================
1. SMC SRAM : PASS
2. LAN9118 : FAIL
3. USB & OTG : PASS
4. KMI1/KMI2 : FAIL
5. MMC & SD : FAIL
6. DVI image : FAIL
7. AACI AC97 : FAIL
8. CF card : FAIL
9. UART port : FAIL
0. Exit
Choice: 0
MAC addrs test: FAILED
MAC address requested was: 00:02:F7:00:45:DE
MAC address read was: 00:02:F7:00:0A:C0
Programming MAC Address
MAC addrs test: PASSED
Reading Site 1 Board File \SITE1\HBI0191B\board.txt
DB1 JTAG configuration complete.
Setting DB1 OSCCLKS...
DB1.0 DCC 0 SPI configuration complete.
Writing SCC 0x40610000 with 0xBB8A802A
Writing SCC 0x40610001 with 0x00001F09
Writing SCC 0x40610002 with 0x00000000
DB1.0 DCC 0 SCC configuration complete.
DB1 SMC clock enabled.
Waiting for SITE1 CB_READY...
Testing DB SMB clock...
Configuring MUXFPGA for MB.
Setting DVI mode for VGA.
Enabling debug USB.
Releasing Daughterboard resets.
Switching MCC log to UART1.
ARM Versatile Express Boot Monitor
Version: V4.0.4
Build Date: Mar 28 2011
Daughterboard Site 1: V2P-CA9 Cortex A9
Daughterboard Site 2: Not Used
>
> help
ALIAS - Create an alias command
CD - Change directory
CLEAR BOOTSCRIPT - Clear boot script
CONFIGURE - Configure Sub-Menu
CONVERT BINARY - Make binary file runable
COPY - Copy a file
CREATE - Create a file
DEBUG - Debug Sub-Menu
DELETE - Delete a file
DIRECTORY - List files in directory
DISPLAY BOOTSCRIPT - Display boot script
ECHO - Echo line
EXIT - Return to Main Menu
FLASH - Flash Sub-Menu
HELP - List commands
K: - Change drive
LINUX - Run linux image
LOAD - Loads an image
M: - Change drive
MKDIR - Create a directory
QUIT - Alias for 'EXIT'
RENAME - Rename a file
RMDIR - Remove a directory
RUN - Run image
SDCARD - SDCard Sub-Menu
SET BOOTSCRIPT - Set boot script
TYPE - Display a text file
VERIFY - Verify a file
>
HBI0190 build 1280
ARM V2M Firmware v2.2.5
Build Date: Apr 5 2011
Date: Tue 20 Apr 2004
Time: 06:51:39
Press Enter to stop auto boot...
Daughterboard fitted to site 1.
Switching on ATXPSU...
ATX3V3: ON
VIOset: 1.8V
MBtemp: 34 degC
Configuring motherboard (rev D, var A)...
IOFPGA config: PASSED
MUXFPGA config: PASSED
OSC CLK config: PASSED
Testing SMC devices (FPGA build 5)...
SRAM 32MB test: PASSED
VRAM 8MB test: PASSED
LAN9118 test: PASSED
USB & OTG test: PASSED
KMI1/KMI2 test: PASSED
MMC & SD test: PASSED
DVI image test: PASSED
AACI AC97 test: PASSED
CF card test: PASSED
UART port test: PASSED
V2M-P1 Peripheral Tests
=======================
1. SMC SRAM : Not Run
2. LAN9118 : Not Run
3. USB & OTG : Not Run
4. KMI1/KMI2 : Not Run
5. MMC & SD : Not Run
6. DVI image : Not Run
7. AACI AC97 : Not Run
8. CF card : Not Run
9. UART port : Not Run
0. Exit
Choice: 1
SMC SRAM and VRAM test...
SRAM 32MB test: PASSED
VRAM 8MB test: PASSED
V2M-P1 Peripheral Tests
=======================
1. SMC SRAM : PASS
2. LAN9118 : FAIL
3. USB & OTG : PASS
4. KMI1/KMI2 : FAIL
5. MMC & SD : FAIL
6. DVI image : FAIL
7. AACI AC97 : FAIL
8. CF card : FAIL
9. UART port : FAIL
0. Exit
Choice: 0
MAC addrs test: FAILED
MAC address requested was: 00:02:F7:00:45:DE
MAC address read was: 00:02:F7:00:0A:C0
Programming MAC Address
MAC addrs test: PASSED
Reading Site 1 Board File \SITE1\HBI0191B\board.txt
DB1 JTAG configuration complete.
Setting DB1 OSCCLKS...
DB1.0 DCC 0 SPI configuration complete.
Writing SCC 0x40610000 with 0xBB8A802A
Writing SCC 0x40610001 with 0x00001F09
Writing SCC 0x40610002 with 0x00000000
DB1.0 DCC 0 SCC configuration complete.
DB1 SMC clock enabled.
Waiting for SITE1 CB_READY...
Testing DB SMB clock...
Configuring MUXFPGA for MB.
Setting DVI mode for VGA.
Enabling debug USB.
Releasing Daughterboard resets.
Switching MCC log to UART1.
ARM Versatile Express Boot Monitor
Version: V4.0.4
Build Date: Mar 28 2011
Daughterboard Site 1: V2P-CA9 Cortex A9
Daughterboard Site 2: Not Used
>
> help
ALIAS - Create an alias command
CD - Change directory
CLEAR BOOTSCRIPT - Clear boot script
CONFIGURE - Configure Sub-Menu
CONVERT BINARY - Make binary file runable
COPY - Copy a file
CREATE - Create a file
DEBUG - Debug Sub-Menu
DELETE - Delete a file
DIRECTORY - List files in directory
DISPLAY BOOTSCRIPT - Display boot script
ECHO - Echo line
EXIT - Return to Main Menu
FLASH - Flash Sub-Menu
HELP - List commands
K: - Change drive
LINUX - Run linux image
LOAD - Loads an image
M: - Change drive
MKDIR - Create a directory
QUIT - Alias for 'EXIT'
RENAME - Rename a file
RMDIR - Remove a directory
RUN - Run image
SDCARD - SDCard Sub-Menu
SET BOOTSCRIPT - Set boot script
TYPE - Display a text file
VERIFY - Verify a file
>
Friday, December 2, 2011
Monday, November 21, 2011
Tegra II vs. TI OMAP PandaBoard
CPU: CoreMark
Memory: Memory Bandwidth/Latency Test
Top 3 Memory Benchmark
(1) STREAM
(2) nbench
(3) LLCbench (cachebench)
Raw Data: tegra-cachebench omap4430-cachebench
Tegra Tegra 250: LPDDR2 600 MHz
PandaBoard OMAP 4430: LPDDR2 400 MHz
You can find the "level" between L1, L2 and system memory.
Memory: Memory Bandwidth/Latency Test
Top 3 Memory Benchmark
(1) STREAM
(2) nbench
(3) LLCbench (cachebench)
Raw Data: tegra-cachebench omap4430-cachebench
Tegra Tegra 250: LPDDR2 600 MHz
PandaBoard OMAP 4430: LPDDR2 400 MHz
You can find the "level" between L1, L2 and system memory.
PandaBoard System Bring-Up
Boot ROM
x-loader
[ ]# make CROSS_COMPILE=arm-linux- omap4430panda_config[ ]# make CROSS_COMPILE=arm-linux- ift
u-boot
[ ]# make CROSS_COMPILE=arm-linux- omap4_panda_config[ ]# make CROSS_COMPILE=arm-linux-
Linux Kernel
linux-3.1.4
[ ]# make ARCH=arm omap2plus_defconfig[ ]# make ARCH=arm CROSS_COMPILE=arm-linux- uImage
[ ]# make ARCH=arm CROSS_COMPILE=arm-linux- modules
[ ]# make ARCH=arm CROSS_COMPILE=arm-linux- INSTALL_MOD_PATH=/media/rootfs/ modules_install
Root File System
Boot-up Message
Texas Instruments X-Loader 1.5.0 (Aug 13 2011 - 09:26:32)
Reading boot sector
Loading u-boot.bin from mmc
U-Boot 2011.06-00000-gb1af6f5-dirty (Nov 30 2011 - 01:26:10)
CPU : OMAP4430
Board: OMAP4 Panda
I2C: ready
DRAM: 1 GiB
MMC: OMAP SD/MMC: 0
Using default environment
In: serial
Out: serial
Err: serial
Hit any key to stop autoboot: 0
reading boot.scr
216 bytes read
Running bootscript from mmc0 ...
## Executing script at 82000000
reading uImage
3791548 bytes read
## Booting kernel from Legacy Image at 82000000 ...
Image Name: Linux-3.1.4
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 3791484 Bytes = 3.6 MiB
Load Address: 80008000
Entry Point: 80008000
Verifying Checksum ... OK
OKStarting kernel ...
Uncompressing Linux... done, booting the kernel.
[ 0.000000] Linux version 3.1.4 (root@scottshu.cavium.com) (gcc version 4.5.2
(arm-cavm-201103) ) #1 SMP Fri Dec 2 10:35:55 CST 2011
[ 0.000000] CPU: ARMv7 Processor [411fc092] revision 2 (ARMv7), cr=10c53c7d
[ 0.000000] CPU: VIPT nonaliasing data cache, VIPT aliasing instruction cache
[ 0.000000] Machine: OMAP4 Panda board
[ 0.000000] Truncating RAM at 80000000-bfffffff to -afffffff (vmalloc region overlap).
[ 0.000000] Reserving 16777216 bytes SDRAM for VRAM
[ 0.000000] Memory policy: ECC disabled, Data cache writealloc
[ 0.000000] OMAP4430 ES2.2
[ 0.000000] SRAM: Mapped pa 0x40300000 to va 0xfe400000 size: 0xe000
[ 0.000000] powerdomain: waited too long for powerdomain dss_pwrdm to complete transition
[ 0.000000] PERCPU: Embedded 8 pages/cpu @c129c000 s10112 r8192 d14464 u32768
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 190976
[ 0.000000] Kernel command line: root=/dev/mmcblk0p2 rw rootwait rootfstype=ext3 console=ttyO2,115200n8 vram=16M
[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes)
[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
[ 0.000000] Memory: 752MB = 752MB total
[ 0.000000] Memory: 750140k/750140k available, 36292k reserved, 0K highmem
[ 0.000000] Virtual kernel memory layout:
[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB)
[ 0.000000] fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
[ 0.000000] DMA : 0xffc00000 - 0xffe00000 ( 2 MB)
[ 0.000000] vmalloc : 0xf0800000 - 0xf8000000 ( 120 MB)
[ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB)
[ 0.000000] modules : 0xbf000000 - 0xc0000000 ( 16 MB)
[ 0.000000] .text : 0xc0008000 - 0xc066616c (6521 kB)
[ 0.000000] .init : 0xc0667000 - 0xc06b1780 ( 298 kB)
[ 0.000000] .data : 0xc06b2000 - 0xc0738448 ( 538 kB)
[ 0.000000] .bss : 0xc073846c - 0xc0c8ec54 (5466 kB)
[ 0.000000] Hierarchical RCU implementation.
[ 0.000000] NR_IRQS:410
[ 0.000000] omap_hwmod: dpll_mpu_m2_ck: missing clockdomain for dpll_mpu_m2_ck.
[ 0.000000] OMAP clockevent source: GPTIMER1 at 32768 Hz
[ 0.000000] sched_clock: 32 bits at 32kHz, resolution 30517ns, wraps every 131071999ms
[ 0.000000] Console: colour dummy device 80x30
[ 0.000000] Lock dependency validator: Copyright (c) 2006 Red Hat, Inc., Ingo Molnar
[ 0.000000] ... MAX_LOCKDEP_SUBCLASSES: 8
[ 0.000000] ... MAX_LOCK_DEPTH: 48
[ 0.000000] ... MAX_LOCKDEP_KEYS: 8191
[ 0.000000] ... CLASSHASH_SIZE: 4096
[ 0.000000] ... MAX_LOCKDEP_ENTRIES: 16384
[ 0.000000] ... MAX_LOCKDEP_CHAINS: 32768
[ 0.000000] ... CHAINHASH_SIZE: 16384
[ 0.000000] memory used by lock dependency info: 3695 kB
[ 0.000000] per task-struct memory footprint: 1152 bytes
[ 0.000671] Calibrating delay loop... 2007.19 BogoMIPS (lpj=7839744)
[ 0.062469] pid_max: default: 32768 minimum: 301
[ 0.063049] Security Framework initialized
[ 0.063262] Mount-cache hash table entries: 512
[ 0.066680] CPU: Testing write buffer coherency: ok
[ 0.067504] Calibrating local timer... 491.68MHz.
[ 0.109588] L310 cache controller enabled
[ 0.109588] l2x0: 16 ways, CACHE_ID 0x410000c4, AUX_CTRL 0x7e470000, Cache size: 1048576 B
[ 0.111968] CPU1: Booted secondary processor
[ 0.111968] CPU1: Unknown IPI message 0x1
[ 0.178314] Brought up 2 CPUs
[ 0.178344] SMP: Total of 2 processors activated (3972.37 BogoMIPS).
[ 0.185424] omap_hwmod: l3_div_ck: missing clockdomain for l3_div_ck.
[ 0.188598] omap_hwmod: dmm: _wait_target_disable failed
[ 0.191162] omap_hwmod: emif_fw: _wait_target_disable failed
[ 0.193756] omap_hwmod: l3_main_1: _wait_target_disable failed
[ 0.196289] omap_hwmod: l3_main_2: _wait_target_disable failed
[ 0.198883] omap_hwmod: l4_abe: _wait_target_disable failed
[ 0.201446] omap_hwmod: l4_cfg: _wait_target_disable failed
[ 0.203979] omap_hwmod: l4_per: _wait_target_disable failed
[ 0.207031] omap_hwmod: l4_wkup: _wait_target_disable failed
[ 0.209594] omap_hwmod: dma_system: _wait_target_disable failed
[ 0.212219] omap_hwmod: dss_core: _wait_target_disable failed
[ 0.214782] omap_hwmod: dss_dispc: _wait_target_disable failed
[ 0.217346] omap_hwmod: dss_dsi1: _wait_target_disable failed
[ 0.219909] omap_hwmod: dss_dsi2: _wait_target_disable failed
[ 0.222473] omap_hwmod: dss_hdmi: _wait_target_disable failed
[ 0.225036] omap_hwmod: dss_rfbi: _wait_target_disable failed
[ 0.227600] omap_hwmod: dss_venc: _wait_target_disable failed
[ 0.231353] omap_hwmod: mailbox: _wait_target_disable failed
[ 0.234161] omap_hwmod: spinlock: _wait_target_disable failed
[ 0.238159] print_constraints: dummy:
[ 0.239013] NET: Registered protocol family 16
[ 0.239501] GPMC revision 6.0
[ 0.243499] omap_device: omap_gpio.0: new worst case activate latency 0: 30517
[ 0.244506] OMAP GPIO hardware version 0.1
[ 0.250335] omap_mux_init: Add partition: #1: core, flags: 2
[ 0.251708] omap_mux_init: Add partition: #2: wkup, flags: 2
[ 0.251800] error setting wl12xx data
[ 0.255065] omap_device: omap_uart.1: new worst case deactivate latency 0: 30517
[ 0.255493] omap_device: omap_uart.2: new worst case activate latency 0: 30517
[ 0.260742] hw-breakpoint: found 6 breakpoint and 1 watchpoint registers.
[ 0.260742] hw-breakpoint: 1 breakpoint(s) reserved for watchpoint single-step.
[ 0.260772] hw-breakpoint: maximum watchpoint size is 4 bytes.
[ 0.266571] OMAP DMA hardware revision 0.0
[ 0.291595] bio: create slab [ 0.293212] print_constraints: vwl1271: 1800 mV
[ 0.295654] SCSI subsystem initialized
[ 0.295928] omap_device: omap2_mcspi.1: new worst case activate latency 0: 30517
[ 0.297302] omap_device: omap2_mcspi.3: new worst case deactivate latency 0:30517
[ 0.298919] usbcore: registered new interface driver usbfs
[ 0.299346] usbcore: registered new interface driver hub
[ 0.299652] usbcore: registered new device driver usb
[ 0.315582] omap_i2c omap_i2c.1: bus 1 rev4.0 at 400 kHz
[ 0.317840] Skipping twl internal clock init and using bootloader value (unknown osc rate)
[ 0.318695] twl6030: PIH (irq 39) chaining IRQs 368..387
[ 0.320220] machine_constraints_voltage: VUSB: failed to apply 3300000uV constraint
[ 0.321472] twl_reg twl_reg.46: can't register VUSB, -22
[ 0.321533] twl_reg: probe of twl_reg.46 failed with error -22
[ 0.322479] print_constraints: VMMC: 1200 <--> 3000 mV at 3000 mV normal standby
[ 0.323547] print_constraints: VPP: 1800 <--> 2500 mV at 1900 mV normal standby
[ 0.324310] print_constraints: VCXIO: 1800 mV normal standby
[ 0.325103] print_constraints: VDAC: 1800 mV normal standby
[ 0.326080] print_constraints: VAUX2_6030: 1200 <--> 2800 mV at 1800 mV normal standby
[ 0.327026] print_constraints: VAUX3_6030: 1000 <--> 3000 mV at 1200 mV normal standby
[ 0.327850] print_constraints: CLK32KG:
[ 0.328613] print_constraints: VANA: 2100 mV normal standby
[ 0.328857] omap_device: omap_i2c.1: new worst case deactivate latency 0: 30517
[ 0.338287] omap_i2c omap_i2c.2: bus 2 rev4.0 at 400 kHz
[ 0.353515] omap_i2c omap_i2c.3: bus 3 rev4.0 at 100 kHz
[ 0.368743] omap_i2c omap_i2c.4: bus 4 rev4.0 at 400 kHz
[ 0.372253] Switching to clocksource 32k_counter
[ 0.376373] Switched to NOHz mode on CPU #0
[ 0.378784] Switched to NOHz mode on CPU #1
[ 0.426971] NET: Registered protocol family 2
[ 0.427429] IP route cache hash table entries: 32768 (order: 5, 131072 bytes)
[ 0.428588] TCP established hash table entries: 131072 (order: 8, 1048576 bytes)
[ 0.430755] TCP bind hash table entries: 65536 (order: 9, 2359296 bytes)
[ 0.447814] TCP: Hash tables configured (established 131072 bind 65536)
[ 0.447967] TCP reno registered
[ 0.447998] UDP hash table entries: 512 (order: 3, 40960 bytes)
[ 0.448303] UDP-Lite hash table entries: 512 (order: 3, 40960 bytes)
[ 0.449096] NET: Registered protocol family 1
[ 0.449920] RPC: Registered named UNIX socket transport module.
[ 0.449920] RPC: Registered udp transport module.
[ 0.449951] RPC: Registered tcp transport module.
[ 0.449951] RPC: Registered tcp NFSv4.1 backchannel transport module.
[ 0.450408] NetWinder Floating Point Emulator V0.97 (double precision)
[ 0.597229] VFS: Disk quotas dquot_6.5.2
[ 0.597412] Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
[ 0.599426] NTFS driver 2.1.30 [Flags: R/O].
[ 0.599639] JFFS2 version 2.2. (NAND) (SUMMARY) �© 2001-2006 Red Hat, Inc.
[ 0.601013] msgmni has been set to 1465
[ 0.602722] io scheduler noop registered
[ 0.602752] io scheduler deadline registered
[ 0.602844] io scheduler cfq registered (default)
[ 0.604461] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
[ 0.701080] omap_uart.0: ttyO0 at MMIO 0x4806a000 (irq = 104) is a OMAP UART0
[ 0.731903] omap_uart.1: ttyO1 at MMIO 0x4806c000 (irq = 105) is a OMAP UART1
[ 0.755340] omap_uart.2: ttyO2 at MMIO 0x48020000 (irq = 106) is a OMAP UART2
[ 1.622955] console [ttyO2] enabled
[ 1.645965] omap_uart.3: ttyO3 at MMIO 0x4806e000 (irq = 102) is a OMAP UART3
[ 1.698669] brd: module loaded
[ 1.710235] loop: module loaded
[ 1.716461] mtdoops: mtd device (mtddev=name/number) must be supplied
[ 1.723236] omap2-nand driver initializing
[ 1.727813] OneNAND driver initializing
[ 1.734863] usbcore: registered new interface driver asix
[ 1.740753] usbcore: registered new interface driver cdc_ether
[ 1.747070] usbcore: registered new interface driver net1080
[ 1.753204] usbcore: registered new interface driver cdc_subset
[ 1.759643] usbcore: registered new interface driver zaurus
[ 1.765502] cdc_ncm: 04-Aug-2011
[ 1.769104] usbcore: registered new interface driver cdc_ncm
[ 1.775970] usbcore: registered new interface driver cdc_wdm
[ 1.781890] Initializing USB Mass Storage driver...
[ 1.787231] usbcore: registered new interface driver usb-storage
[ 1.793518] USB Mass Storage support registered.
[ 1.798919] usbcore: registered new interface driver libusual
[ 1.805175] usbcore: registered new interface driver usbtest
[ 1.811798] mousedev: PS/2 mouse device common for all mice
[ 1.819641] omap_device: omap_i2c.1: new worst case activate latency 0: 91552
[ 1.827362] twl_rtc twl_rtc: Power up reset detected.
[ 1.833648] twl_rtc twl_rtc: Enabling TWL-RTC.
[ 1.840576] twl_rtc twl_rtc: rtc core: registered twl_rtc as rtc0
[ 1.847473] i2c /dev entries driver
[ 1.853088] Driver for 1-wire Dallas network protocol.
[ 1.859313] omap_device: omap_wdt.-1: new worst case activate latency 0: 91552
[ 1.867767] OMAP Watchdog Timer Rev 0x00: initial timeout 60 sec
[ 1.880187] omap_device: omap_hsmmc.4: new worst case activate latency 0: 30517
[ 1.888793] omap_device: omap_hsmmc.0: new worst case activate latency 0: 61035
[ 1.897125] usbcore: registered new interface driver usbhid
[ 1.902954] usbhid: USB HID core driver
[ 1.907073] oprofile: hardware counters not available
[ 1.912353] oprofile: using timer interrupt.
[ 1.917175] TCP cubic registered
[ 1.920593] Initializing XFRM netlink socket
[ 1.925109] NET: Registered protocol family 17
[ 1.929809] NET: Registered protocol family 15
[ 1.934600] Registering the dns_resolver key type
[ 1.939788] VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 1
[ 1.947845] ThumbEE CPU extension supported.
[ 1.958312] Power Management for TI OMAP4.
[ 1.979187] clock: disabling unused clocks to save power
[ 1.987152] regulator_init_complete: VANA: incomplete constraints, leaving on
[ 1.996154] regulator_init_complete: VDAC: incomplete constraints, leaving on
[ 2.004150] regulator_init_complete: VCXIO: incomplete constraints, leaving on
[ 2.013397] twl_rtc twl_rtc: setting system clock to 2000-01-01 00:00:00 UTC(946684800)
[ 2.023925] Waiting for root device /dev/mmcblk0p2...
[ 2.204864] mmc0: host does not support reading read-only switch. assuming write-enable.
[ 2.213439] mmc0: new SDHC card at address aaaa
[ 2.219818] mmcblk0: mmc0:aaaa SD08G 7.40 GiB
[ 2.228607] mmcblk0: p1 p2
[ 2.261932] kjournald starting. Commit interval 5 seconds
[ 2.278076] EXT3-fs (mmcblk0p2): using internal journal
[ 2.283782] EXT3-fs (mmcblk0p2): mounted filesystem with ordered data mode
[ 2.291168] VFS: Mounted root (ext3 filesystem) on device 179:2.
[ 2.297729] Freeing init memory: 296K
INIT: [ 2.450866] omap_device: omap_hsmmc.4: new worst case deactivate latency 0: 30517
version 2.86 booting
Please wait: booting...
Starting udev
[ 2.898681] udevd (554): /proc/554/oom_adj is deprecated, please use /proc/554/oom_score_adj instead.
[ 3.153900] omap_device: omap_hsmmc.0: new worst case deactivate latency 0: 61035
[ 4.684570] alignment: ignoring faults is unsafe on this CPU. Defaulting tofixup mode.
Remounting root file system...
Caching udev devnodes
Populating dev cache
ALSA: Restoring mixer settings...
Configuring network interfaces... /usr/sbin/alsactl: load_state:1625: No soundca
rds found...
ifconfig: SIOCGIFFLAGS: No such device
done.
Starting portmap daemon: portmap.
net.ipv4.conf.default.rp_filter = 1
net.ipv4.conf.all.rp_filter = 1
Mon Nov 21 18:17:00 UTC 2011
INIT: Entering runlevel: 5
Starting system message bus: dbus.
Starting Dropbear SSH server: dropbear.
Starting advanced power management daemon: No APM support in kernel
(failed.)
Starting syslogd/klogd: done
* Starting Avahi mDNS/DNS-SD Daemon: avahi-daemon
...done.
omap4430-panda login: root
root@omap4430-panda:~#
root@omap4430-panda:~# uname -a
Linux omap4430-panda 3.1.4 #1 SMP Fri Dec 2 10:35:55 CST 2011 armv7l unknown
root@omap4430-panda:~# cat /proc/interrupts
CPU0 CPU1
39: 2 0 GIC TWL6030-PIH
41: 0 0 GIC l3-dbg-irq
42: 0 0 GIC l3-app-irq
44: 1813 0 GIC DMA
52: 0 0 GIC gpmc
69: 14 0 GIC gp timer
88: 245 0 GIC omap_i2c
89: 0 0 GIC omap_i2c
91: 13 0 GIC mmc1
93: 0 0 GIC omap_i2c
94: 0 0 GIC omap_i2c
102: 0 0 GIC serial idle
104: 0 0 GIC serial idle
105: 0 0 GIC serial idle
106: 169 0 GIC serial idle, OMAP UART2
115: 3072 0 GIC mmc0
379: 0 0 twl6030 rtc0
384: 1 0 twl6030
IPI0: 0 0 Timer broadcast interrupts
IPI1: 1282 1565 Rescheduling interrupts
IPI2: 0 0 Function call interrupts
IPI3: 16 118 Single function call interrupts
IPI4: 0 0 CPU stop interrupts
LOC: 1853 1976 Local timer interrupts
Err: 0
root@omap4430-panda:~# cat /proc/iomem
00000000-00000000 : omap_wdt
00000000-00000000 : omap-mcbsp.4
00000000-00000000 : omap-mcbsp.3
00000000-00000000 : omap-mcbsp.3
00000000-00000000 : omap-mcbsp.2
00000000-00000000 : omap-mcbsp.2
00000000-00000000 : omap-mcbsp.1
00000000-00000000 : omap-mcbsp.1
00000000-00000000 : omap_dma_system.0
00000000-00000000 : omap2_mcspi.4
00000000-00000000 : omap2_mcspi.3
00000000-00000000 : omap2_mcspi.2
00000000-00000000 : omap2_mcspi.1
00000000-00000000 : omapdss_hdmi
00000000-00000000 : omapdss_hdmi
00000000-00000000 : omapdss_dsi2
00000000-00000000 : omapdss_dsi2
00000000-00000000 : omapdss_dsi1
00000000-00000000 : omapdss_dsi1
00000000-00000000 : omapdss_venc
00000000-00000000 : omapdss_venc
00000000-00000000 : omapdss_rfbi
00000000-00000000 : omapdss_rfbi
00000000-00000000 : omapdss_dispc
00000000-00000000 : omapdss_dispc
00000000-00000000 : omapdss_dss
00000000-00000000 : omapdss_dss
00000000-00000000 : musb-omap2430
00000000-00000000 : omap_hsmmc.4
00000000-00000000 : omap_hsmmc.0
00000000-00000000 : omap_uart.3
00000000-00000000 : omap_uart.2
00000000-00000000 : omap_uart.1
00000000-00000000 : omap_uart.0
00000000-00000000 : omap_i2c.4
00000000-00000000 : omap_i2c.3
00000000-00000000 : omap_i2c.2
00000000-00000000 : omap_i2c.1
00000000-00000000 : omap_hwspinlock.0
00000000-00000000 : omap_gpio.5
00000000-00000000 : omap_gpio.4
00000000-00000000 : omap_gpio.3
00000000-00000000 : omap_gpio.2
00000000-00000000 : omap_gpio.1
00000000-00000000 : omap_gpio.0
00000000-00000000 : iva.0
00000000-00000000 : l3_main_1.0
00000000-00000000 : omap_l3_noc.0
00000000-00000000 : omap_l3_noc.0
00000000-00000000 : omap_l3_noc.0
40122000-401220ff : mpu
40124000-401240ff : mpu
40126000-401260ff : mpu
44000000-44000fff : l3_main_1.0
44000000-44000fff : omap_l3_noc.0
44800000-44801fff : omap_l3_noc.0
45000000-45000fff : omap_l3_noc.0
48020000-480200ff : omap_uart.2
48020000-480200ff : omap_uart
48040000-4804007f : omapdss_dss
48041000-48041fff : omapdss_dispc
48042000-480420ff : omapdss_rfbi
48043000-480430ff : omapdss_venc
48044000-480441ff : omapdss_dsi1
48045000-480451ff : omapdss_dsi2
48046000-48046fff : omapdss_hdmi
48055000-480551ff : omap_gpio.1
48057000-480571ff : omap_gpio.2
48059000-480591ff : omap_gpio.3
4805b000-4805b1ff : omap_gpio.4
4805d000-4805d1ff : omap_gpio.5
48060000-480600ff : omap_i2c.3
48060000-480600ff : omap_i2c
4806a000-4806a0ff : omap_uart.0
4806a000-4806a0ff : omap_uart
4806c000-4806c0ff : omap_uart.1
4806c000-4806c0ff : omap_uart
4806e000-4806e0ff : omap_uart.3
4806e000-4806e0ff : omap_uart
48070000-480700ff : omap_i2c.1
48070000-480700ff : omap_i2c
48072000-480720ff : omap_i2c.2
48072000-480720ff : omap_i2c
48096000-480960ff : omap-mcbsp.4
48098100-480982ff : omap2_mcspi.1
48098100-480982ff : omap2_mcspi.1
4809a100-4809a2ff : omap2_mcspi.2
4809a100-4809a2ff : omap2_mcspi.2
4809c100-4809c4ff : omap_hsmmc.0
4809c100-4809c4ff : omap_hsmmc
480a0000-480a004f : omap_rng
480b8100-480b82ff : omap2_mcspi.3
480b8100-480b82ff : omap2_mcspi.3
480ba100-480ba2ff : omap2_mcspi.4
480ba100-480ba2ff : omap2_mcspi.4
480d5100-480d54ff : omap_hsmmc.4
480d5100-480d54ff : omap_hsmmc
48350000-483500ff : omap_i2c.4
48350000-483500ff : omap_i2c
49022000-490220ff : dma
49024000-490240ff : dma
49026000-490260ff : dma
4a056000-4a056fff : omap_dma_system.0
4a0ab000-4a0ab003 : musb-omap2430
4a0f6000-4a0f6fff : omap_hwspinlock.0
4a310000-4a3101ff : omap_gpio.0
4a314000-4a31407f : omap_wdt
4a314000-4a31407f : omap_wdt
58000000-5800007f : omapdss_dss
58001000-58001fff : omapdss_dispc
58002000-580020ff : omapdss_rfbi
58003000-580030ff : omapdss_venc
58004000-580041ff : omapdss_dsi1
58005000-580051ff : omapdss_dsi2
58006000-58006fff : omapdss_hdmi
5a000000-5a07ffff : iva.0
80000000-aeffffff : System RAM
80008000-8066616b : Kernel text
806b2000-80c8ec53 : Kernel data
root@omap4430-panda:~# cat /proc/cpuinfo
Processor : ARMv7 Processor rev 2 (v7l)
processor : 0
BogoMIPS : 2007.19
processor : 1
BogoMIPS : 1956.77
Features : swp half thumb fastmult vfp edsp thumbee neon vfpv3 tls
CPU implementer : 0x41
CPU architecture: 7
CPU variant : 0x1
CPU part : 0xc09
CPU revision : 2
Hardware : OMAP4 Panda board
Revision : 0020
Serial : 0000000000000000
Wednesday, October 12, 2011
Dennis Ritchie 逝世
The creator of the C programming language.
The key developer of the UNIX operating system.
Photo from http://www.webadictos.com.mx/2011/10/13/fallece-dennis-ritchie/
The key developer of the UNIX operating system.
Photo from http://www.webadictos.com.mx/2011/10/13/fallece-dennis-ritchie/
Thursday, October 6, 2011
Wednesday, September 21, 2011
Cortex-A9 OMAP4430
Cortex-A9 OMAP4430
Purchased from Digi-Key. Shipped by UPS.
Unpacking PandaBoard
Other Required Accessories
1. 5V Power Supply
2. USB to Serial Cable (pl2303 converter)
3. Ethernet Cable
4. USB Cable
5. USB Flash Drive
6. SD Memory Card
7. HDMI Cable
8. JTAG Cable
Copy from http://pandaboard.org/sites/default/files/board_setup_v3.png
Purchased from Digi-Key. Shipped by UPS.
Unpacking PandaBoard
Other Required Accessories
1. 5V Power Supply
2. USB to Serial Cable (pl2303 converter)
3. Ethernet Cable
4. USB Cable
5. USB Flash Drive
6. SD Memory Card
7. HDMI Cable
8. JTAG Cable
Copy from http://pandaboard.org/sites/default/files/board_setup_v3.png
Friday, September 16, 2011
Pre-build Root File System for ARM Platform
Fedora RFS:
Download
RPMs:
http://archives.fedoraproject.org/pub/fedora-secondary/development/arm/os/Packages/
Ubuntu RFS:
Download
Build Online:
http://narcissus.angstrom-distribution.org
Download
RPMs:
http://archives.fedoraproject.org/pub/fedora-secondary/development/arm/os/Packages/
Ubuntu RFS:
Download
Build Online:
http://narcissus.angstrom-distribution.org
Thursday, August 11, 2011
ARM Coprocessor
CP10: Single-Precision Vector Floating Point Coprocessor
CP11: Double-Precision Vector Floating Point Coprocessor
CP14: Debug Coprocessor / Hardware Acceleration of Java Bytecodes
CP15: System Control Coprocessor
CP11: Double-Precision Vector Floating Point Coprocessor
CP14: Debug Coprocessor / Hardware Acceleration of Java Bytecodes
CP15: System Control Coprocessor
Wednesday, July 13, 2011
Tuesday, June 14, 2011
ARM Qemu
Qemu
[ ]# cd /home/qemu/
[ ]# git clone git://git.qemu.org/qemu.git qemu-git
[ ]# cd qemu-git/
[ ]# ./configure --target-list="arm-softmmu"
[ ]# make
[ ]# cp arm-softmmu/qemu-system-arm /usr/bin/
Or
http://download.savannah.gnu.org/releases/qemu/qemu-0.14.1.tar.gz
[ ]# wget http://ftp.denx.de/pub/u-boot/u-boot-2010.03.tar.bz2
[ ]# cd u-boot-2010.03
[ ]# make versatilepb_config ARCH=arm CROSS_COMPILE=arm-linux-
[ ]# make all ARCH=arm CROSS_COMPILE=arm-linux-
[ ]# qemu-system-arm -M versatilepb -m 128M -nographic -kernel u-boot.bin
[ ]# echo "#include" > test.c
[ ]# echo "int main() {" >> test.c
[ ]# echo -e '\tprintf("Hello World!\\n");' >> test.c
[ ]# echo -e "return 0;" >> test.c
[ ]# echo "}" >> test.c
[ ]# arm-linux-gcc -static test.c -o test
[ ]# echo test | cpio -o --format=newc > rootfs
ARM Linux Versatile (ARMv5)
[ ]# cd /home/qemu/
[ ]# wget http://www.kernel.org/pub/linux/kernel/v2.6/longterm/v2.6.35/linux-2.6.35.12.tar.bz2
[ ]# tar jxvf linux-2.6.35.12.tar.bz2
[ ]# cd linux-2.6.35.12
[ ]# make ARCH=arm versatile_defconfig
[ ]# make ARCH=arm menuconfig
Enabling EABI support in the kernel. (CONFIG_AEABI=y, CONFIG_OABI_COMPAT=y)
[ ]# make ARCH=arm CROSS_COMPILE=arm-linux- all
[ ]# qemu-system-arm -M versatilepb -m 128M -kernel arch/arm/boot/zImage -initrd rootfs -serial stdio -append "console=ttyAMA0 root=/dev/ram rdinit=/test"
You can use “-nographic” instead of “-serial stdio” to launch QEMU without opening another window, but then to close it you have to type Ctrl-A and then “x”.
How to install Qemu in Linux for Versatile Express platform
Processor: Cortex A9
COREMU
Qemu
[ ]# mkdir /home/qemu[ ]# cd /home/qemu/
[ ]# git clone git://git.qemu.org/qemu.git qemu-git
[ ]# cd qemu-git/
[ ]# ./configure --target-list="arm-softmmu"
[ ]# make
[ ]# cp arm-softmmu/qemu-system-arm /usr/bin/
Or
http://download.savannah.gnu.org/releases/qemu/qemu-0.14.1.tar.gz
U-boot
[ ]# cd /home/qemu/[ ]# wget http://ftp.denx.de/pub/u-boot/u-boot-2010.03.tar.bz2
[ ]# cd u-boot-2010.03
[ ]# make versatilepb_config ARCH=arm CROSS_COMPILE=arm-linux-
[ ]# make all ARCH=arm CROSS_COMPILE=arm-linux-
[ ]# qemu-system-arm -M versatilepb -m 128M -nographic -kernel u-boot.bin
U-Boot 2010.03 (Jun 15 2011 - 14:38:26)
DRAM: 0 kB
## Unknown FLASH on Bank 1 - Size = 0x00000000 = 0 MB
Flash: 0 kB
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: SMC91111-0
VersatilePB # print
bootargs=root=/dev/nfs mem=128M ip=dhcp netdev=25,0,0xf1010000,0xf1010010,eth0
bootdelay=2
baudrate=38400
bootfile="/tftpboot/uImage"
stdin=serial
stdout=serial
stderr=serial
verify=n
ethact=SMC91111-0
Environment size: 202/8188 bytes
VersatilePB #
Simple "Hello World!" Root File System
[ ]# cd /home/qemu/[ ]# echo "#include
[ ]# echo "int main() {" >> test.c
[ ]# echo -e '\tprintf("Hello World!\\n");' >> test.c
[ ]# echo -e "return 0;" >> test.c
[ ]# echo "}" >> test.c
[ ]# arm-linux-gcc -static test.c -o test
[ ]# echo test | cpio -o --format=newc > rootfs
ARM Linux Versatile (ARMv5)
[ ]# cd /home/qemu/
[ ]# wget http://www.kernel.org/pub/linux/kernel/v2.6/longterm/v2.6.35/linux-2.6.35.12.tar.bz2
[ ]# tar jxvf linux-2.6.35.12.tar.bz2
[ ]# cd linux-2.6.35.12
[ ]# make ARCH=arm versatile_defconfig
[ ]# make ARCH=arm menuconfig
Enabling EABI support in the kernel. (CONFIG_AEABI=y, CONFIG_OABI_COMPAT=y)
[ ]# make ARCH=arm CROSS_COMPILE=arm-linux- all
[ ]# qemu-system-arm -M versatilepb -m 128M -kernel arch/arm/boot/zImage -initrd rootfs -serial stdio -append "console=ttyAMA0 root=/dev/ram rdinit=/test"
You can use “-nographic” instead of “-serial stdio” to launch QEMU without opening another window, but then to close it you have to type Ctrl-A and then “x”.
How to install Qemu in Linux for Versatile Express platform
Processor: Cortex A9
COREMU
Sunday, June 12, 2011
Linux Kernel Tracer
# mount -t debugfs nodev /sys/kernel/debug
# cat /sys/kernel/debug/tracing/available_tracers
wakeup preemptirqsoff preemptoff irqsoff function sched_switch nop
# cat /sys/kernel/debug/tracing/current_tracer
nop
# echo sched_switch > /sys/kernel/debug/tracing/current_tracer
# cat /sys/kernel/debug/tracing/current_tracer
sched_switch
# cat /sys/kernel/debug/tracing/trace_options
noprint-parent nosym-offset nosym-addr noverbose
# echo print-parent > /sys/kernel/debug/tracing/trace_options
# echo 1 > /sys/kernel/debug/tracing/tracing_enabled
# cat /sys/kernel/debug/tracing/trace > /tmp/trace.txt
# echo 0 > /sys/kernel/debug/tracing/tracing_enabled
# cat /sys/kernel/debug/tracing/available_tracers
wakeup preemptirqsoff preemptoff irqsoff function sched_switch nop
# cat /sys/kernel/debug/tracing/current_tracer
nop
# echo sched_switch > /sys/kernel/debug/tracing/current_tracer
# cat /sys/kernel/debug/tracing/current_tracer
sched_switch
# cat /sys/kernel/debug/tracing/trace_options
noprint-parent nosym-offset nosym-addr noverbose
# echo print-parent > /sys/kernel/debug/tracing/trace_options
# echo 1 > /sys/kernel/debug/tracing/tracing_enabled
# cat /sys/kernel/debug/tracing/trace > /tmp/trace.txt
# echo 0 > /sys/kernel/debug/tracing/tracing_enabled
Thursday, June 9, 2011
OProfile on ARM Linux
How to compile OProfile
--target=arm-linux \
--host=arm-linux \
--build=i686-pc-linux-gnu \
--enable-shared \
--prefix=/home/oprofile/binutils-stable_bin \
--disable-nls --disable-poison-system-directories
[ ]#make
[ ]#make install
--with-kernel-support \
--disable-optimization \
--disable-werror \
--target=arm-linux \
--host=arm-linux \
--build=i686-pc-linux-gnu \
--enable-static \
--with-binutils=/home/oprofile/binutils-stable_bin \
--prefix=/home/oprofile/oprofile-0.9.6_bin
[ ]#make
How to use OProfile on ARM platform
Default: timer mode, $ modprobe oprofile timer=1
$ opcontrol --reset
$ opcontrol --init
$ opcontrol --start --vmlinux=/tmp/vmlinux --session-dir=/tmp/linux
$ opcontrol --start-daemon
$ opcontrol --dump
$ opcontrol --save=output
$ opreport --session-dir=/tmp/linux session:output -l image:/tmp/vmlinux
Sample Rate = HZ
OProfile with performance counter
$ opcontrol --callgraph=8 --separate=kernel --vmlinux=/boot/vmlinux
$ opcontrol --event=CPU_CYCLES:100000:0:1:1 \
--event=L1D_CACHE:100000:0:1:1 \
--event=L2D_CACHE:10000:0:1:1 \
--event=BUS_ACCESS:100000:0:1:1 \
--event=BUS_CYCLES:100000:0:1:1 \
--event=UNALIGNED_LDST_RETIRED:10000:0:1:1
$ opcontrol --init
$ opcontrol --reset
$ opcontrol --start-daemon
$ opcontrol --status
$ opcontrol --start
$ opcontrol --dump
$ opreport
Sample Rate = (CPU frequency in MHz) / (CPU_CYCLES count) / 64.
The default value of CPU_CYCLES = 100000. The CPU_CYCLES can be changed as following example “--event=CPU_CYCLES:125000".
If CPU is running in 800MHz, the sample rate is 800MHz / 100000 / 64 = 125 samples per second.
Reference:
http://friendalways.blogspot.com/2009/11/oprofile-on-arm-linux.html
binutils
[ ]#./configure \--target=arm-linux \
--host=arm-linux \
--build=i686-pc-linux-gnu \
--enable-shared \
--prefix=/home/oprofile/binutils-stable_bin \
--disable-nls --disable-poison-system-directories
[ ]#make
[ ]#make install
oprofile-0.9.6
[ ]#./configure --with-linux=/home/linux-2.6.35.12-cavm1 \--with-kernel-support \
--disable-optimization \
--disable-werror \
--target=arm-linux \
--host=arm-linux \
--build=i686-pc-linux-gnu \
--enable-static \
--with-binutils=/home/oprofile/binutils-stable_bin \
--prefix=/home/oprofile/oprofile-0.9.6_bin
[ ]#make
How to use OProfile on ARM platform
Default: timer mode, $ modprobe oprofile timer=1
$ opcontrol --reset
$ opcontrol --init
$ opcontrol --start --vmlinux=/tmp/vmlinux --session-dir=/tmp/linux
$ opcontrol --start-daemon
$ opcontrol --dump
$ opcontrol --save=output
$ opreport --session-dir=/tmp/linux session:output -l image:/tmp/vmlinux
Sample Rate = HZ
OProfile with performance counter
$ opcontrol --callgraph=8 --separate=kernel --vmlinux=/boot/vmlinux
$ opcontrol --event=CPU_CYCLES:100000:0:1:1 \
--event=L1D_CACHE:100000:0:1:1 \
--event=L2D_CACHE:10000:0:1:1 \
--event=BUS_ACCESS:100000:0:1:1 \
--event=BUS_CYCLES:100000:0:1:1 \
--event=UNALIGNED_LDST_RETIRED:10000:0:1:1
$ opcontrol --init
$ opcontrol --reset
$ opcontrol --start-daemon
$ opcontrol --status
$ opcontrol --start
$ opcontrol --dump
$ opreport
Sample Rate = (CPU frequency in MHz) / (CPU_CYCLES count) / 64.
The default value of CPU_CYCLES = 100000. The CPU_CYCLES can be changed as following example “--event=CPU_CYCLES:125000".
If CPU is running in 800MHz, the sample rate is 800MHz / 100000 / 64 = 125 samples per second.
Reference:
http://friendalways.blogspot.com/2009/11/oprofile-on-arm-linux.html
Wednesday, June 8, 2011
HD over Wireless
1. WiVu: Cavium
2. WiDi (Wireless Display): Intel
3. WiHD (Wireless HD): Intel, ...
4. WiGig: Wilocity (Atheros)
5. WHDI: AMIMON, Sibeam ()
2. WiDi (Wireless Display): Intel
3. WiHD (Wireless HD): Intel, ...
4. WiGig: Wilocity (Atheros)
5. WHDI: AMIMON, Sibeam ()
Tuesday, May 10, 2011
aclocal.m4 Error
Q:
aclocal.m4:14: error: this file was generated for autoconf 2.61.You have another version of autoconf. If you want to use that,
you should regenerate the build system entirely.
aclocal.m4:14: the top level
autom4te: /usr/bin/m4 failed with exit status: 63
make: *** [configure] Error 1
A:
Running aclocal to create aclocal.m4[ ]# aclocal
Running autoheader to create config.h.in
[ ]# autoheader
Running automake to create Makefile.in
[ ]# automake
Running autoconf to create configure
[ ]# autoconf
Run ./configure and then make to compile the code
[ ]# ./configure
[ ]# make
Saturday, April 30, 2011
How to install CodeSourcery ARM Cross-Compiler on Mac
ARM EABI Version
RTOS systems or bare metal systems where no operating system is present. These configurations should not be used to build Linux kernels or applications.
The source tarball includes:
binutils-2010.09-51.tar.bz2
cloog-2010.09-51.tar.bz2
coreutils-2010.09-51.tar.bz2
expat-2010.09-51.tar.bz2
gcc-2010.09-51.tar.bz2
gdb-2010.09-51.tar.bz2
gmp-2010.09-51.tar.bz2
libelf-2010.09-51.tar.bz2
libiconv-2010.09-51.tar.bz2
make-2010.09-51.tar.bz2
mpc-2010.09-51.tar.bz2
mpfr-2010.09-51.tar.bz2
newlib-2010.09-51.tar.bz2
ppl-2010.09-51.tar.bz2
zlib-2010.09-51.tar.bz2
How to rebuild the toolchain from CodeSourcery released source tarball
$ git clone https://github.com/jsnyder/arm-eabi-toolchain.git
$ cd arm-eabi-toolchain
$ sudo make install-deps
$ sudo make install-cross
$ export PATH=$HOME/arm-cs-tools/bin:$PATH
ARM GNU/Linux Version
Systems running full Linux, i.e., Linux on CPUs with an MMU. Use Sourcery G++ to build both the Linux kernel and applications.
The source tarball includes:
The difference between these 2 versions are the C library and, of course, the Linux kernel source code.
glibc-2010.09-50.tar.bz2
glibc_localedef-2010.09-50.tar.bz2
glibc_ports-2010.09-50.tar.bz2
Reference:
1. https://github.com/jsnyder/arm-eabi-toolchain
2.
RTOS systems or bare metal systems where no operating system is present. These configurations should not be used to build Linux kernels or applications.
The source tarball includes:
binutils-2010.09-51.tar.bz2
cloog-2010.09-51.tar.bz2
coreutils-2010.09-51.tar.bz2
expat-2010.09-51.tar.bz2
gcc-2010.09-51.tar.bz2
gdb-2010.09-51.tar.bz2
gmp-2010.09-51.tar.bz2
libelf-2010.09-51.tar.bz2
libiconv-2010.09-51.tar.bz2
make-2010.09-51.tar.bz2
mpc-2010.09-51.tar.bz2
mpfr-2010.09-51.tar.bz2
newlib-2010.09-51.tar.bz2
ppl-2010.09-51.tar.bz2
zlib-2010.09-51.tar.bz2
How to rebuild the toolchain from CodeSourcery released source tarball
$ git clone https://github.com/jsnyder/arm-eabi-toolchain.git
$ cd arm-eabi-toolchain
$ sudo make install-deps
$ sudo make install-cross
$ export PATH=$HOME/arm-cs-tools/bin:$PATH
ARM GNU/Linux Version
Systems running full Linux, i.e., Linux on CPUs with an MMU. Use Sourcery G++ to build both the Linux kernel and applications.
The source tarball includes:
The difference between these 2 versions are the C library and, of course, the Linux kernel source code.
glibc-2010.09-50.tar.bz2
glibc_localedef-2010.09-50.tar.bz2
glibc_ports-2010.09-50.tar.bz2
Reference:
1. https://github.com/jsnyder/arm-eabi-toolchain
2.
Friday, April 29, 2011
Mac Developer Centor
Apple Mac Dev Center
Download GCC Compiler Xcode 3.2.6 and iOS SDK 4.3
Install GIT
http://code.google.com/p/git-osx-installer/
Or using macports
$ sudo port selfupdate
$ sudo port install git-core +svn
For cross-compiler, the "--build" and "--host" are change to x86_64-apple-darwin10.0
sh-3.2# echo $MACHTYPE
x86_64-apple-darwin10.0
Download GCC Compiler Xcode 3.2.6 and iOS SDK 4.3
Install GIT
http://code.google.com/p/git-osx-installer/
Or using macports
$ sudo port selfupdate
$ sudo port install git-core +svn
For cross-compiler, the "--build" and "--host" are change to x86_64-apple-darwin10.0
sh-3.2# echo $MACHTYPE
x86_64-apple-darwin10.0
Friday, March 25, 2011
TuxScreen
A interesting gift from my friend! Thanks Descent.
The TuxScreen Phone is a limited edition StrongARM Linux project platform. Actually, StrongARM is the first ARM-based SoC that I have used in my career.
Reference:
sourceforge.net
tuxscreen.net
https://www.taupro.com/Projects/Hardware/TuxScreen
The TuxScreen Phone is a limited edition StrongARM Linux project platform. Actually, StrongARM is the first ARM-based SoC that I have used in my career.
Reference:
sourceforge.net
tuxscreen.net
https://www.taupro.com/Projects/Hardware/TuxScreen
Friday, March 18, 2011
HOWTO install OpenOCD in Fedora 14
Compile OpenOCD
[ ]# mkdir /home/OpenOCD
[ ]# cd /home/OpenOCD
Download FT2xxx USB-UART drivers from FTDI Ltd
[ ]# wget http://www.ftdichip.com/Drivers/D2XX/Linux/libftd2xx0.4.16.tar.gz
[ ]# tar zxvf libftd2xx0.4.16.tar.gz
[ ]# cd libftd2xx0.4.16
[ ]# cp ftd2xx.h WinTypes.h /usr/include/
[ ]# cp libftd2xx.so.0.4.16 /usr/lib/libftd2xx.so.0.4.16
[ ]# ln -sf /usr/lib/libftd2xx.so.0.4.16 /usr/lib/libftd2xx.so.0.4
[ ]# ln -sf /usr/lib/libftd2xx.so.0.4.16 /usr/lib/libftd2xx.so.0
[ ]# ln -sf /usr/lib/libftd2xx.so.0.4.16 /usr/lib/libftd2xx.so
Download/Compile latest OpenOCD from GIT:
[ ]# cd /home/OpenOCD
[ ]# git clone git://openocd.git.sourceforge.net/gitroot/openocd/openocd
[ ]# cd openocd
[ ]# ./bootstrap
[ ]# ./configure --enable-maintainer-mode --enable-ft2232_ftd2xx
[ ]# make
[ ]# make install
Or Download/Compile OpenOCD 4.0 tarball
[ ]# wget http://download.berlios.de/openocd/openocd-0.4.0.tar.bz2
[ ]# tar jxvf openocd-0.4.0.tar.bz2
[ ]# cd openocd-0.4.0
[ ]# ./configure --enable-maintainer-mode --enable-ft2232_ftd2xx
[ ]# make
[ ]# make install
What OpenOCD can do for a developer
1. Read/Write register on your target
2. Read/Write memory on your target
3. Program flash chips
4. GDB
5. more...
How to use OpenOCD
[ ]# mkdir /home/OpenOCD
[ ]# cd /home/OpenOCD
Download FT2xxx USB-UART drivers from FTDI Ltd
[ ]# wget http://www.ftdichip.com/Drivers/D2XX/Linux/libftd2xx0.4.16.tar.gz
[ ]# tar zxvf libftd2xx0.4.16.tar.gz
[ ]# cd libftd2xx0.4.16
[ ]# cp ftd2xx.h WinTypes.h /usr/include/
[ ]# cp libftd2xx.so.0.4.16 /usr/lib/libftd2xx.so.0.4.16
[ ]# ln -sf /usr/lib/libftd2xx.so.0.4.16 /usr/lib/libftd2xx.so.0.4
[ ]# ln -sf /usr/lib/libftd2xx.so.0.4.16 /usr/lib/libftd2xx.so.0
[ ]# ln -sf /usr/lib/libftd2xx.so.0.4.16 /usr/lib/libftd2xx.so
Download/Compile latest OpenOCD from GIT:
[ ]# cd /home/OpenOCD
[ ]# git clone git://openocd.git.sourceforge.net/gitroot/openocd/openocd
[ ]# cd openocd
[ ]# ./bootstrap
[ ]# ./configure --enable-maintainer-mode --enable-ft2232_ftd2xx
[ ]# make
[ ]# make install
Or Download/Compile OpenOCD 4.0 tarball
[ ]# wget http://download.berlios.de/openocd/openocd-0.4.0.tar.bz2
[ ]# tar jxvf openocd-0.4.0.tar.bz2
[ ]# cd openocd-0.4.0
[ ]# ./configure --enable-maintainer-mode --enable-ft2232_ftd2xx
[ ]# make
[ ]# make install
What OpenOCD can do for a developer
1. Read/Write register on your target
2. Read/Write memory on your target
3. Program flash chips
4. GDB
5. more...
How to use OpenOCD
Running OpenOCD on Cavium Networks CNS3000/CNW5000 Platform
[ ]# ./openocd -f openocd-cnx.cfgOpen On-Chip Debugger 0.4.0 (2011-03-22-03:04)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.berlios.de/doc/doxygen/bugs.html
6000 kHz
trst_and_srst separate srst_gates_jtag trst_push_pull srst_open_drain
jtag_ntrst_delay: 100
jtag_nsrst_delay: 100
Info : device: 4 "2232C"
Info : deviceID: 341266712
Info : SerialNumber:
Info : Description: USB<=>JTAG&RS232 A
Info : clock speed 6000 kHz
Info : JTAG tap: arm11.cpu tap/device found: 0x07b37477 (mfg: 0x23b, part: 0x7b37, ver: 0x0)
Info : JTAG tap: arm11.cpu tap/device found: 0x07b37477 (mfg: 0x23b, part: 0x7b37, ver: 0x0)
Warn : JTAG tap: arm11.cpu UNEXPECTED: 0x07b37477 (mfg: 0x23b, part: 0x7b37, ver: 0x0)
Error: JTAG tap: arm11.cpu expected 1 of 1: 0xffffffff (mfg: 0x7ff, part: 0xffff, ver: 0xf)
Error: Trying to use configured scan chain anyway...
Warn : Bypassing JTAG setup events due to errors
Info : found ARM11 MPCore
Info : arm11.cpu: hardware has 6 breakpoints, 2 watchpoints
Info : accepting 'telnet' connection from 0
Recover u-boot
[ ]# telnet localhost 4444
> halt
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x600001d3 pc: 0x000146c4
> flash probe 0
Flash Manufacturer/Device: 0x0001 0x227e
configuration specifies 0x800000 size, but a 0x1000000 size flash was found
flash 'cfi' found at 0x10000000
> flash list
{name cfi base 268435456 size 8388608 bus_width 2 chip_width 2}
> flash info 0
#0 : cfi at 0x10000000, size 0x00800000, buswidth 2, chipwidth 2
# 0: 0x00000000 (0x20000 128kB) protection state unknown
# 1: 0x00020000 (0x20000 128kB) protection state unknown
# 2: 0x00040000 (0x20000 128kB) protection state unknown
. . .
#125: 0x00fa0000 (0x20000 128kB) protection state unknown
#126: 0x00fc0000 (0x20000 128kB) protection state unknown
#127: 0x00fe0000 (0x20000 128kB) protection state unknown
cfi information:
mfr: 0x0001, id:0x227e
qry: 'QRY', pri_id: 0x0002, pri_addr: 0x0040, alt_id: 0x0000, alt_addr: 0x0000
Vcc min: 2.7, Vcc max: 3.6, Vpp min: 0.0, Vpp max: 0.0
typ. word write timeout: 64, typ. buf write timeout: 64, typ. block erase timeout: 512, typ. chip erase timeout: 524288
max. word write timeout: 512, max. buf write timeout: 2048, max. block erase timeout: 4096, max. chip erase timeout: 2097152
size: 0x1000000, interface desc: 2, max buffer write size: 40
Spansion primary algorithm extend information:
pri: 'PRI', version: 1.3
Silicon Rev.: 0x5, Address Sensitive unlock: 0x0
Erase Suspend: 0x2, Sector Protect: 0x1
VppMin: 11.5, VppMax: 12.5
> flash erase_address 0x10000000 0x40000
erased address 0x10000000 (length 262144) in 1.737926s (147.302 kb/s)
> flash write_bank 0 /tftpboot/u-boot.bin 0
No working memory available. Specify -work-area-phys to target.
Programming at 10000000, count 000295d8 bytes remaining
Programming at 10000100, count 000294d8 bytes remaining
. . .
Programming at 10029300, count 000002d8 bytes remaining
Programming at 10029400, count 000001d8 bytes remaining
Programming at 10029500, count 000000d8 bytes remaining
wrote 169432 bytes from file /tftpboot/u-boot.bin to flash bank 0 at offset 0x00000000 in 810.315613s (0.204 kb/s)
> reset
> halt
> arm disassemble 0x10000000
core state: ARM
0x00989680 0xfdfefbfd LDC2L p11, c15, [r14, #244]!
0x10000000 0xea000013 B 0x10000054
0x10000004 0xe59ff014 LDR r15, [r15, #0x14]
0x10000008 0xe59ff014 LDR r15, [r15, #0x14]
0x10000000 0xea000013 B 0x10000054
0x10000004 0xe59ff014 LDR r15, [r15, #0x14]
0x10000008 0xe59ff014 LDR r15, [r15, #0x14]
0x1000000c 0xe59ff014 LDR r15, [r15, #0x14]
0x10000010 0xe59ff014 LDR r15, [r15, #0x14]
0x10000014 0xe59ff014 LDR r15, [r15, #0x14]
0x10000018 0xe59ff014 LDR r15, [r15, #0x14]
0x1000001c 0xe59ff014 LDR r15, [r15, #0x14]
0x10000020 0x00000120 ANDEQ r0, r0, r0, LSR #0x2
0x10000024 0x00000180 ANDEQ r0, r0, r0, LSL #0x3
0x10000028 0x000001e0 ANDEQ r0, r0, r0, ROR #0x3
0x1000002c 0x00000240 ANDEQ r0, r0, r0, ASR #0x4
0x10000030 0x000002a0 ANDEQ r0, r0, r0, LSR #0x5
0x10000034 0x00000300 ANDEQ r0, r0, r0, LSL #0x6
0x10000038 0x00000360 ANDEQ r0, r0, r0, ROR #0x6
0x1000003c 0xdeadbeef CDPLE p14, 0x0a, c11, c13, c15, 0x07
0x10000040 0x00000000 ANDEQ r0, r0, r0
0x10000044 0x00000000 ANDEQ r0, r0, r0
0x10000048 0x08000000 STMDAEQ r0, i??i??i}
0x1000004c 0x000295d8 LDREQD r9, [r2], -r8
0x10000050 0x00071600 ANDEQ r1, r7, r0, LSL #0xc
0x10000054 0xe10f0000 MRS r0, CPSR
0x10000058 0xe3c0001f BIC r0, r0, #0x1f
0x1000005c 0xe38000d3 ORR r0, r0, #0xd3
...
Here is what I used to try -- [$800 NT, $30 USD]
OpenJTAG ARM JTAG USB
TargetName Type Endian TapName State
-- ------------------ ---------- ------ ------------------ ------------
0* arm11.cpu arm11 little arm11.cpu halted
Recover u-boot
[ ]# telnet localhost 4444
> halt
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x600001d3 pc: 0x000146c4
> flash probe 0
Flash Manufacturer/Device: 0x0001 0x227e
configuration specifies 0x800000 size, but a 0x1000000 size flash was found
flash 'cfi' found at 0x10000000
> flash list
{name cfi base 268435456 size 8388608 bus_width 2 chip_width 2}
> flash info 0
#0 : cfi at 0x10000000, size 0x00800000, buswidth 2, chipwidth 2
# 0: 0x00000000 (0x20000 128kB) protection state unknown
# 1: 0x00020000 (0x20000 128kB) protection state unknown
# 2: 0x00040000 (0x20000 128kB) protection state unknown
. . .
#125: 0x00fa0000 (0x20000 128kB) protection state unknown
#126: 0x00fc0000 (0x20000 128kB) protection state unknown
#127: 0x00fe0000 (0x20000 128kB) protection state unknown
cfi information:
mfr: 0x0001, id:0x227e
qry: 'QRY', pri_id: 0x0002, pri_addr: 0x0040, alt_id: 0x0000, alt_addr: 0x0000
Vcc min: 2.7, Vcc max: 3.6, Vpp min: 0.0, Vpp max: 0.0
typ. word write timeout: 64, typ. buf write timeout: 64, typ. block erase timeout: 512, typ. chip erase timeout: 524288
max. word write timeout: 512, max. buf write timeout: 2048, max. block erase timeout: 4096, max. chip erase timeout: 2097152
size: 0x1000000, interface desc: 2, max buffer write size: 40
Spansion primary algorithm extend information:
pri: 'PRI', version: 1.3
Silicon Rev.: 0x5, Address Sensitive unlock: 0x0
Erase Suspend: 0x2, Sector Protect: 0x1
VppMin: 11.5, VppMax: 12.5
> flash erase_address 0x10000000 0x40000
erased address 0x10000000 (length 262144) in 1.737926s (147.302 kb/s)
> flash write_bank 0 /tftpboot/u-boot.bin 0
No working memory available. Specify -work-area-phys to target.
Programming at 10000000, count 000295d8 bytes remaining
Programming at 10000100, count 000294d8 bytes remaining
. . .
Programming at 10029300, count 000002d8 bytes remaining
Programming at 10029400, count 000001d8 bytes remaining
Programming at 10029500, count 000000d8 bytes remaining
wrote 169432 bytes from file /tftpboot/u-boot.bin to flash bank 0 at offset 0x00000000 in 810.315613s (0.204 kb/s)
> reset
Disassemble u-boot
[ ]# telnet localhost 4444> halt
> arm disassemble 0x10000000
core state: ARM
0x00989680 0xfdfefbfd LDC2L p11, c15, [r14, #244]!
0x10000000 0xea000013 B 0x10000054
0x10000004 0xe59ff014 LDR r15, [r15, #0x14]
0x10000008 0xe59ff014 LDR r15, [r15, #0x14]
0x10000000 0xea000013 B 0x10000054
0x10000004 0xe59ff014 LDR r15, [r15, #0x14]
0x10000008 0xe59ff014 LDR r15, [r15, #0x14]
0x1000000c 0xe59ff014 LDR r15, [r15, #0x14]
0x10000010 0xe59ff014 LDR r15, [r15, #0x14]
0x10000014 0xe59ff014 LDR r15, [r15, #0x14]
0x10000018 0xe59ff014 LDR r15, [r15, #0x14]
0x1000001c 0xe59ff014 LDR r15, [r15, #0x14]
0x10000020 0x00000120 ANDEQ r0, r0, r0, LSR #0x2
0x10000024 0x00000180 ANDEQ r0, r0, r0, LSL #0x3
0x10000028 0x000001e0 ANDEQ r0, r0, r0, ROR #0x3
0x1000002c 0x00000240 ANDEQ r0, r0, r0, ASR #0x4
0x10000030 0x000002a0 ANDEQ r0, r0, r0, LSR #0x5
0x10000034 0x00000300 ANDEQ r0, r0, r0, LSL #0x6
0x10000038 0x00000360 ANDEQ r0, r0, r0, ROR #0x6
0x1000003c 0xdeadbeef CDPLE p14, 0x0a, c11, c13, c15, 0x07
0x10000040 0x00000000 ANDEQ r0, r0, r0
0x10000044 0x00000000 ANDEQ r0, r0, r0
0x10000048 0x08000000 STMDAEQ r0, i??i??i}
0x1000004c 0x000295d8 LDREQD r9, [r2], -r8
0x10000050 0x00071600 ANDEQ r1, r7, r0, LSL #0xc
0x10000054 0xe10f0000 MRS r0, CPSR
0x10000058 0xe3c0001f BIC r0, r0, #0x1f
0x1000005c 0xe38000d3 ORR r0, r0, #0xd3
...
Here is what I used to try -- [$800 NT, $30 USD]
OpenJTAG ARM JTAG USB
The man page for ARM11 CPU
(Download)Friday, March 11, 2011
Android 3.0 SDK
The Android 3.0 platform is available as a downloadable component for the Android SDK.
Install the Android SDK in Mac OS (MacBook Air)
scottshu$ cd /Users/scottshu/android-sdk-mac_x86
scottshu$ tools/android update sdk
Install the ADT (Android Developments Tools) Plugin for Eclipse.
ADT plugin for Eclipse
Add Android platforms and other components to your SDK.
Reference:
http://developer.android.com/sdk/installing.html
Install the Android SDK in Mac OS (MacBook Air)
scottshu$ cd /Users/scottshu/android-sdk-mac_x86
scottshu$ tools/android update sdk
Install the ADT (Android Developments Tools) Plugin for Eclipse.
ADT plugin for Eclipse
Add Android platforms and other components to your SDK.
Reference:
http://developer.android.com/sdk/installing.html
Tuesday, March 8, 2011
Friday, March 4, 2011
Tuesday, March 1, 2011
Wednesday, February 23, 2011
Jazelle
Jazelle technology is found in many ARM cores. It provides hardware acceleration of managed execution environments such as Java and Microsoft Compact Framework.
Two variants of Jazelle acceleration exist:
JTEKTM - Java Technology Enabling Kit - is a software component that can be integrated into an existing JVM (Java Virtual Machine) in order to enable Jazelle hardware acceleration.
This acceleration is completely transparent from the Java developer's point of view - no modifications are required in the application code to take advantage of the acceleration.
Two variants of Jazelle acceleration exist:
- Jazelle DBX (Direct Bytecode eXecution) - provides hardware execution of most Java bytecodes.
- Jazelle RCT (Run-time Compilation Target) - provides generic extensions to accelerate AOT (ahead-of-time) and JIT (just-in-time) compilation of Java and other execution environment applications.
JTEKTM - Java Technology Enabling Kit - is a software component that can be integrated into an existing JVM (Java Virtual Machine) in order to enable Jazelle hardware acceleration.
This acceleration is completely transparent from the Java developer's point of view - no modifications are required in the application code to take advantage of the acceleration.
Tuesday, February 22, 2011
RCU
Read-Copy Update (RCU)
As an example of real-world use of RCU, consider the network routing tables. Every outgoing packet requires a check of the routing tables to determine which interface should be used. The check is fast, and, once the kernel has found the target interface, it no longer needs the routing table entry. RCU allows route lookups to be performed without locking, with significant performance benefits. The Starmode radio IP driver in the kernel also uses RCU to keep track of its list of devices. (Copy from LDD3)
As an example of real-world use of RCU, consider the network routing tables. Every outgoing packet requires a check of the routing tables to determine which interface should be used. The check is fast, and, once the kernel has found the target interface, it no longer needs the routing table entry. RCU allows route lookups to be performed without locking, with significant performance benefits. The Starmode radio IP driver in the kernel also uses RCU to keep track of its list of devices. (Copy from LDD3)
Tuesday, February 15, 2011
Monday, February 14, 2011
Friday, February 11, 2011
Thursday, February 10, 2011
DDR SDRAM (DDR1/2/3/4)
ODT (On Die Termination)
Starting from DDR2, memory could have ODT in IC.
A very short introduction here.
OCD (Off-chip Driver) Calibration
A very short introduction here.
Posted CAS (Column Address Strobe) Additive Latency
CAS: A signal sent from a processor (memory controller) to a DRAM circuit to indicate that the column address lines are valid.
DQ/DQS
Uses a strobe signal (DQS) to latch data (DQ)
Strobe: One of the signals of a memory device, which is asserted to tell the memory device that the signal are valid. Upon receiving this signal the selected memory device starts the memory access (read/write). It may be driven directly by the processor (memory controller) during write and may be driven directly by the memory device during read.
DDR Comparison
Starting from DDR2, memory could have ODT in IC.
A very short introduction here.
OCD (Off-chip Driver) Calibration
A very short introduction here.
Posted CAS (Column Address Strobe) Additive Latency
CAS: A signal sent from a processor (memory controller) to a DRAM circuit to indicate that the column address lines are valid.
DQ/DQS
Uses a strobe signal (DQS) to latch data (DQ)
Strobe: One of the signals of a memory device, which is asserted to tell the memory device that the signal are valid. Upon receiving this signal the selected memory device starts the memory access (read/write). It may be driven directly by the processor (memory controller) during write and may be driven directly by the memory device during read.
DDR Comparison
Monday, February 7, 2011
ARM NEON SIMD
NEON
Optimizing
Performance
Reference:
1. ARM
2. Optimizing Embedded Software - A Look at the NEON SIMD unit in the ARM Cortex Family of Processors
Optimizing
Performance
Reference:
1. ARM
2. Optimizing Embedded Software - A Look at the NEON SIMD unit in the ARM Cortex Family of Processors
Thursday, January 20, 2011
RTL
RTL
RTL stands for Register Transfer Level. It is a high-level hardware description language (HDL) used for defining digital circuits. The most popular RTL languages are VHDL and Verilog.
RTL stands for Register Transfer Level. It is a high-level hardware description language (HDL) used for defining digital circuits. The most popular RTL languages are VHDL and Verilog.
Saturday, January 8, 2011
Tuesday, January 4, 2011
SLAB/SLUB/SLOB
Linux Memory Management
SLAB Allocaror
SLUB Allocaror
SLOB Allocaror
Reference:
Linux Kernel Heap Tampering Detection
- Buddy System
- Slab Allocator
- Allocate 4KB (PAGE_SIZE)
- Page based memory
- Allocate smaller than 4KB
- Object based memory
SLAB Allocaror
SLUB Allocaror
SLOB Allocaror
Reference:
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