DDR SDRAM (DDR1/2/3/4)

DDR 2/3 SDRAM (Double Data Rate)

ODT (On Die Termination)
Starting from DDR2, memory could have ODT in IC.
A very short introduction here.

OCD (Off-chip Driver) Calibration
A very short introduction here.

Posted CAS (Column Address Strobe) Additive Latency
CAS: A signal sent from a processor (memory controller) to a DRAM circuit to indicate that the column address lines are valid.

DQ/DQS
Uses a strobe signal (DQS) to latch data (DQ)

Strobe: One of the signals of a memory device, which is asserted to tell the memory device that the signal are valid. Upon receiving this signal the selected memory device starts the memory access (read/write). It may be driven directly by the processor (memory controller) during write and may be driven directly by the memory device during read.

DDR Comparison